Software Pipelining and Superblock Scheduling: Compilation Techniques for VLIW Machines
نویسندگان
چکیده
© Copyright Hewlett-Packard Company 1992 Compilers for VLIW and superscalar processors have to expose instruction-level parallelism to effectively utilize the hardware. Software pipelining is a scheduling technique to overlap successive iterations of loops, while superblock scheduling extracts ILP from frequently executed traces. This paper describes an effort to employ both software pipelining and superblock scheduling techniques in a VLIW compiler. Our results show that the two techniques used together are effective for accelerating a variety of programs.
منابع مشابه
Compiler and Architectural Techniques for Improving the Effectiveness of VLIW Compilation
Effective VLIW compilation requires optimizing across basic block boundaries. In this mildly opinionated paper we survey a variety of techniques which allow the compiler to do so. We focus on trace scheduling, speculative execution. and software pipelining. These techniques are effective, but cannot in general optimally schedule instructions for all traces of execution. To address this problem,...
متن کاملSoftware Pipelining: An Effective Scheduling Technique for VLIW Machines
The basic idea behind software pipelining was first developed by Patel and Davidson for scheduling hardware pipe-lines. As instructionlevel parallelism made its way into general-purpose computing, it became necessary to automate scheduling. How and whether instructions can be scheduled statically have major ramifications on the design of computer architectures. Rau and Glaeser were the first to...
متن کاملEffective Instruction Prefetching In Chip Multiprocessors
threaded application performance, often achieved through instruction level parallelism per chip is increasing, the software and hardware techniques to exploit the potential of studies mostly involve distributed shared memory multiprocessors and fetching will not be fully effective at masking the remote fetch latency. the effective address of the load instructions along that path based upon a hi...
متن کاملLifetime-Sensitive Modulo Scheduling in a Production Environment
ÐThis paper presents a novel software pipelining approach, which is called Swing Modulo Scheduling (SMS). It generates schedules that are near optimal in terms of initiation interval, register requirements, and stage count. Swing Modulo Scheduling is a heuristic approach that has a low computational cost. This paper first describes the technique and evaluates it for the Perfect Club benchmark s...
متن کاملModeling Instruction-Level Parallelism for Software Pipelining
Software pipelining is an attractive method to schedule code for processors that exhibit instruction-level parallelism such as pipelined, super-scalar, and (V)LIW machines. It has been implemented for a variety of processors ( e.g. FPS-164[10], Warp[9], Cydra-5[7]), and a number of pipelining algorithms have been described in the literature. Software pipelining produces a schedule so that the e...
متن کامل